System integration for visual pattern processing based on CMOS technology
- 物理技术－会议论文 
An integrated system for visual pattern processing was proposed in this paper for implemented with CMOS technology. It consists of three parts: Variable Sensitivity Photo Detectors, control circuit. and parallel network. A 256x256 pixels array of 3-bits resolution is designed into the system chip for pattern recognition. In order to testing the design result. it was simulated with Spice model parameters of 1.2 mu m CMOS process.