磁共振成像仪通信及脉冲生成模块的设计

Abstract

针对小型化核磁共振成像仪主控板的功能需要提出新的设计方式,采用FPGA开发板作为主控板,以Nios II嵌入式软核作为协处理器,通过在其上移植μC/OS-Ⅱ操作系统及lwIP协议栈,实现与计算机的网络通信;使用Verilog硬件描述语言编写脉冲序列生成模块,实现对指令的解析以及执行,形成用户要求的脉冲序列。最终测试结果表明,主控板的通信速率以及通过示波器采集得到的脉冲序列均满足成像仪系统要求。而且这种软硬结合的设计方式与以往全软件的设计相比,使成像仪精度更高,性能更加稳定。

To satisfy the require of the MRI main control board,this paper puts forwards a new design which uses FPGA development board as main control board and uses Nios II as a co-processor.We transplant theμC/OS-II operating system and protocol stack lwIP to achieve the network communication with computers.Then we use the hardware language Verilog to write pulse sequence generation module to achieve the analysis and execution of the command.Eventually it produces user's pulse sequence.Final test results show that the communication rate of the main control board and pulse sequence which is obtained by oscilloscope can satisfy the requirements of the MRI system.Compared with the past of the whole software design,this design make the MRI system higher precision and more stable.