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dc.contributor.author李威
dc.contributor.author李开航
dc.contributor.author王亮
dc.date.accessioned2016-07-01T08:33:00Z
dc.date.available2016-07-01T08:33:00Z
dc.date.issued2010
dc.identifier.citation现代电子技术,2010,(4):20-23+36
dc.identifier.issn1004-373X
dc.identifier.otherXDDJ201004006
dc.identifier.urihttps://dspace.xmu.edu.cn/handle/2288/127084
dc.description.abstract设计一款可应用于压力传感器的高精度三阶2-1级联结构SIgMA-dElTA调制器。MATlAb SIMulInk建模仿真表明,信号带宽为500Hz,过采样率为128的情况下,该调制器信噪比高达119db。通过对调制器非理想因数的分析,采用典型的0.35μM工艺整体实现该调制器,并用SPECTrE仿真,电路信噪比可达106.2db,高于16位要求的98db,整个调制器的功耗约为7MW。
dc.description.abstractA third order single bit 2-1 cascade sigma-delta modulator which can be applied to pressure sensor is presented.The sigma-delta modulator design flow contains system level and circuit level design.The oversampling ratio is 128 and signal bandwidth is 500 Hz.SNR achieves 119 dB by means of behavior modeling simulations with Matlab Simulink and exceeds 106 dB under circuit level.The whole modulator power consumption is estimated around 7 mW.
dc.language.isozh_CN
dc.subjectSigma-Delta调制器
dc.subjectSimulink行为建模
dc.subject信噪比
dc.subject开关电容电路
dc.subjectSigma-Delta modulator
dc.subjectSimulink behavior modeling
dc.subjectSNR
dc.subjectSC circuits
dc.title16-Bit三阶级联结构Sigma-Delta调制器的设计
dc.title.alternativeDesign of 16-Bit Third Order Cascade Sigma-Delta Modulator
dc.typeArticle


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